Join 75,798 users and earn money for participation

Evaluation for backside clean

0 3 boost
Avatar for technician
Written by   30
4 weeks ago
Topics: Work

 A little update on the project we follow this far:

MEMS BACKSIDE CLEAN EVALUATE                                 

BACKGROUND:

ENGINEER evaluate for backside clean, this wafer after dry etch sent to coat recipe front side, then do 1% HF 5min to clean backside. After HF clean will strip resist use SVC14, but now SVC14 still pending vendor, so as Aigen comment we sent to strip resist use batch540. now I done 1pc wafer(slot01) R-ST-RIN at batch540, but under scope can see some red colour defect at wafer edge, refer attached pic.

                     

Please follow up to take another wafer use EKC to strip resist then inspect. Take LM#02 together with LM#01 to do EKC , LM#02 after strip inspect under scope can see the same defect as LM#01.  Please help sent 2pcs wafer(LM#01,02) to do 100% CAMTECK scan. 2pcs wafer I put in the slot01~02.  

                                                                   

2pcs send to CAMTEK 100% scan, handcarry to QC operator. Please follow up to data.   The 2pcs gave done scan and review, lot parked at EWS etch bay rack.

                                                                         

As today excel sheet update is: Pending Huni getting approval of using SVC14 from wet oxide team. To pend until Monday for Huni.                             

 

Night dinnot handle the lot. Please follow hld comment. Check with wet ox engineer, the EKC bench already changed to use  chemical SVC14, now send 23psc of Ww12 to Gold fab coat resist but encount . DNS machine transport problem (all have coat), Please follow up with coat front side, just follow template.

                                                    

HF 1% step done at EEWB1. Lot parked at UBM Engineer table awaiting for the WOE SVC14 availability due to they have high WIP. Shift Engineer already informed to handover to G3 shift to allocate. 

                                

EKC strip done, merge LM#1/2,send QC to 100% CAMTEK, Please follow Result , Please follow to collect data.

                     

LM#0324,LOW yield<80%,is 32%65%,lot in QC, As consulted with Chrisi, already take LM#03 to use chamber 3 to strip resist, now wafer is at tegal bay pc desk.Please take LM#04 to wash S4(EKC),then sent this 2pcs to do CAMTEK.

                                                  

LM#04 washed and scan result is 47%,less than 80% low yield, defect all at center.LM#03 97.7% pass,which restrip using TG1C. Need to compare the LM#03/04 pre and post re-strip CAMTEK  data. But at the end of the shift I check the CAMTEK data QC operator give me, only 16pcs,Please help to get the others data and send Chrisi.

                 

No time to follow up due to run 6 lots RND with 100% AEI. Please send lM#03 to strip 5E1C then scan CAMTEK. Machine still down under MS, still on going troubleshooting. Please follow up to send lM#0325 to strip 5ETE1C then scan CAMTEK.                   

 

This morning N3 talk to device, and afternoon decide to send lM#03~25 to strip 51C then scan CAMTEK again, now machine running product, when finish, Please follow up to strip and CAMTEK.                         

 

LM#3~25 now running "R-ST-RIN" in 5ETE01. Please follow up to send to QC and request to scan CAMTEK 100%.Feedback from MS some pcs have rinser fault timeout, please help check in the lot history and check wafer.     

 

3pcs encounter "rinser fault timeout" alarm, MS resume and the 23pcs already finish rinse-strip-rinse, check 3pcs alarm wafer history, done process already. Send to QC to 100% CAMTEK, Please follow up result.

1
$ 0.18
$ 0.18 from @TheRandomRewarder
Avatar for technician
Written by   30
4 weeks ago
Topics: Work
Enjoyed this article?  Earn Bitcoin Cash by sharing it! Explain
...and you will also help the author collect more tips.

Comments