Abnormal pattern on test wafers

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2 years ago
Topics: Work

We need to urgent activated the line support for test wafers mixture.

George prepared 7 wafers bare Si wafers placed beside PSE, which to send for standard SiN. Mask Via(any product - to take note of what pdt)                                 

 

Need to Etch Via (To etch using fix time; normally use endpoint. To ask dry spin what is the average etch time used for and add additional 20-30s. Ensure that it is    

etch to clear)                                                                 

 

Sputter std Ta/Au as per the pdt flow. Need to etch in 3B-> 10mins -> inspect FS + BS(see roughness) with photos. Etch 65mins and inspect both FS+BS to check for any Au seeding                 

                                                                               

Mask Via done, sent for etch via fix time 60s, inspected wfr via cleared, sent for gasonic and sts. Wfrs passed to A4 operator to sputter.

                                                            

Etched 1pc 65mins in GSEB4B (PG2) observed did not have any bubbling while processing. Opened the door at the 1st 5mins, 30mins, then last 5mins of the process but did not see any bubble. Check wafer did not have any black particles (but got lot of scratches & debris like defect). Etched another 65mins & inspect again still no black particles seen.

                                             

Sent the same wfr to 5min BOE in 4A+65min TSE in 4B. No bubbles observed during the 1st 2mins of the process. Seen with Si attacked at the backside but FS no black parts                              

 

2 wafers sent to Mask Pad (manual align). 5 wafers placed back to back (including prev wafer etched) for 5mins BOE+65 mins TSE. Inspected the 5 wafers backside Si attacked but FS no black parts.

           

2pcs etch pad done.to confirm simulation to be done. 2 wafer which done pad etch sent to strip resist.                  

 

Pls verify location of wafers or of already done sts as no handover from G3 according to G4 operator. 2 sample done strip resist and vac seal. keep on rack.

               

Draw another 2 testwafer lot to follow CSPPUM6E-6F product flow. 2 lots passed to batching to dep passivation with insruction form. Please hand carry every steps.                                                        

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2 years ago
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